Arun Prakash Jana
Principal Engineer, R&D at Broadcom | Ex Novell, Samsung | MS
- Role
- Principal Engineer at Broadcom
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Arun Prakash Jana
Architect, designer and programmer. Has 20+ years of industrial experience. Professionally working on enterprise storage controller chips now. Passionate about the challenges in high system-level complexity. Worked on storage controller HW-SW co-design, reverse engineering tool, OS, bootloader, filesystems, gaming algorithm (mimicking the human brain), UEFI, NVME.+ 9 granted patents+ 10 patent application filings under processing with USPTO+ 19 inventions protected as Trade Secrets by Broadcom IP+ First inventor of 41 inventionsMaintains and contributes to several open source projects as a pastime [1].7 of those are available on Debian, Ubuntu, Fedora, openSUSE, AUR, macOS, Free/OpenBSD and many other distros. Loves to build the missing tools to optimise productivity. The utilities are powered by interesting features. Some of them have ecosystems around them.Also a hobbyist writer [2].Volunteered as a judge for the 2025 and 2026 US National STEM Festival submissions.Likes chess. Reached 2126 ELO (standard time control) on FICS but hardly finds any time to play of late. Stays tuned to world music. Other areas of interest include world politics, human psychology, cognitive AI and weapon tech.[1] https://github.com/jarun[2] https://nearlypoetry.in
Experience
Principal Engineer
Nov 2015 — Present · Bengaluru, IN
Next-generation storage controller design and development+ Worked on multiple modules and layers across multiple generations+ Team lead with key role in technical directions, strategies and decisions+ Specialisation in IO path for RAID controller, IO data cache and buffer management+ Zero data loss recovery on power-failure, controller reset, drive removal+ Preserved cache and write journal handling in live and power-failure cases+ Fault tolerance and resumption of HW units on resource crunch and deadlocks+ Critical defects and data corruption analysis+ Customer (OEM) interfacing through cadence meetings+ Scoping and development ownership of product requirementsIP generation - first inventor of 41 state-of-the-art inventions.Owns several complex and core designs across HW revisions and has many design contributions across modules.
Education
Birla Institute of Technology and Science, Pilani
Master of Science - MS, Software Systems
2012 — 2014
West Bengal University of Technology, Kolkata
Bachelor of Technology - BTech, Computer Engineering
2001 — 2005
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