Aparna Subramanian

Pre-Silicon Validation Lead Engineer working on Intel GPU, Power Management.

Role
Component Design Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Aparna Subramanian

Currently working as Pre Silicon validation lead at Intel Technologies India, with focus on Intel Discrete Graphics Power Management validation. Experienced in Intel Chipsets with focus on Manageability Engine and Power Management.Pursued Graduate program with a Masters Degree in Electrical Engineering at University of Florida and interned at Intel Corporation as a Pre-Silicon HW security validation intern.

Experience

  1. Component Design Engineer

    Intel

    Sep 2013 — Present · Sacramento, CA, US

    Pre silicon HW validation of Intel Chipsets (platform controller hub).• Architecting, designing, debugging OVM-based verification tests and checkers (scoreboards) alone or sharing responsibilities with team.• Turning design documentation into a test plan, detailing the stimulus, checking, and coverage required.• Finding root cause for failures in either test bench or in RTL design code or micro-architectural level. • Documenting failures in a bug tracking database and driving them to closure.• Actively supporting integration teams to port over the OVM tests to full chip level and help with their debug, requests and enhancements.• Automate the test suite regressions for the team using shell and cron jobs.• Creating in-house validation indicator dashboard using Perl, HTML to help team keep track of the unit health.

Education

  • University of Florida

    Master of Science, Electrical and Computer Engineering

    2011 — 2013

  • Anna University Chennai

    Bachelor of Engineering, Electronics and Communication Engineering

    2007 — 2011

Skills

  • Html Scripting
  • Chipscope
  • Synopsis Vcs
  • Universal Asynchronous Receiver/Transmitter (Uart)
  • Formal Verification
  • Dvt
  • Matlab
  • Vim
  • Rtl Design
  • Ovm
  • C++
  • Pcie
  • Cadence Virtuoso
  • Vlsi
  • Chipset
  • Computer Architecture
  • Rtl Coding
  • Modelsim
  • Assembly Language
  • Systemverilog
  • Verilog
  • Assertion Based Verification
  • Integrated Circuit Design
  • Microprocessors
  • Xilinx Ise
  • Pcb Design
  • Template Toolkit
  • Shell Scripting
  • Object-Oriented Programming (Oop)
  • Fpga
  • Asic
  • Perl
  • Embedded Systems
  • Unix
  • Vhdl
  • Very-Large-Scale Integration (Vlsi)
  • Hardware Security

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Aparna Subramanian — Component Design Engineer at Intel in Bengaluru, KA, IN | Unifers