Aparajita Sao
DFT Manager | ABIST Verification Leader | 18+ Years in Processor Verification | 3nm–22nm Nodes | IBM
- Role
- Verification Engineer at IBM
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Aparajita Sao
Accomplished verification leader with 18+ years of experience driving innovations in ABIST for P/Z processors. Proven expertise across advanced technology nodes from 22nm to 3nm, with deep specialization in memory BIST, scan, register verification, and end-to-end verification strategies.Extensive experience leading global teams across the US, Germany, and India,and building high-performing teams. Known for delivering complex projects with strong execution, automation improvements, and cross-functional collaboration with logic, array, DFT, and SoA teams.Passionate about combining technical depth with strong people leadership to drive scalable, high-quality verification solutions for next-generation semiconductor designs.
Experience
Verification Engineer
Sep 2007 — Present
Experiance in Scan, ABIST, Pervasive Functional Verification, SCOM of IBM P and Z processorsExperience in Processor chip level verification
Education
Indian Institute of Technology (Banaras Hindu University), Varanasi
Master of Technology (M.Tech.), Thesis - An Improved Technique for Low Power Scan Based Testing of CMOS Circuits
2005 — 2007
RIT Raipur
Bachelor of Engineering (BE) - Honors, Electronics & telecommunications
2000 — 2004
Skills
- Computer Architecture
- Testing
- Debugging
- Logic Design
- Microprocessors
- Vlsi
- Hardware Architecture
- Scan
- Semiconductors
- Processors
- Rtl Design
- Mis
- Vhdl
- Simulations
- Functional Verification
- Mbist
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