Anusua Das
Stand-in Line Manager @Infineon Technologies
Signup · Get unlimited contacts
WORK HISTORY
Stand-in Line Manager @Infineon Technologies
Manage a team of 5 digital design engineers and 2 interns- set and follow up on annual targets - resource management- hiring
EDUCATION
Calcutta Airport English High School
Higher Secondary, Science
University of Applied Sciences, Darmstadt
Dual Master's degree, Electrical, Electronics and Communications Engineering
Calcutta institute of engineering and management
Bachelor of Technology (BTech), Electronics and Communication Engineering
Hartley's High School
Secondary
ABOUT ANUSUA DAS
I am a Double Masters in Electrical Engineering with specialization in Communication Engineering and major area of interest is in digital electronics and firmware development. As an engineer at heart, the world of semiconductor technology and electrical circuits has always been a passion of mine. I have keen interest in the domain of digital IC design and verification. FPGA/ASIC Design, programming with Verilog/VHDL, System Verilog, doing simulations (Mentor Graphics, Xilinx) is my major area of work. Through my prior Industrial experiences, I have assembled sound knowledge in the domain of digital circuit design. I have 9+ years of experience working in the ASIC/FPGA domain, developing products targeted for automotive, consumer electronics and broadcast media sector. My current responsibility is Line Management, where I manage a team of 5 digital design engineers alongwith 2 interns, majorly focussing on resource management, and team leadership.Achievements: 1. Won IP reuse award among a total of ~300 employees for fostering IP reuse concepts and thereby enabling faster time-to-market 2. Won a Spot Award in the department (consisting of 80 people) for the following: a. Leading 6 projects at the same time in parallel, delivering in time and with high quality b. Secured a customer win, despite of limited chances & exposure to a new business line My past academic achievements include my Master thesis being selected for \"Professor Döhrer Stiftung\" award and selected the best conference paper at the International Conference of Consumer Electronics at Taiwan. I speak fluent English and good German. I love to win, but helping others as a team gives me greater joy! I constantly try to educate myself and thrive myself to be a better person. Professional skills:Verilog/VHDL programming, Linux/Unix, System Verilog, PythonTop Tools knowledge:Xilinx Vivado Design Suite, QuestaSim, NC-Sim, Synopsys Design Vision, Cadence Genus, Cadence Tessent, Altium Designer, Microsoft Visio Domain knowledge:Digital circuit design, automotive electronics, broadcast media industryI am still working on gathering more knowledge and improving my areas and I am quite happy of the fact that I still work on the products and solutions that have an impact on everyone\'s lives!
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.