Anusha Naganur

DFT Engineer

Role
Dft Engineer at Qualcomm
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Anusha Naganur

TRAINED DFT ENGINEERDFT (Design For Testabilty) Domain - trained in DFT (Synopsys Tool) Scan insertion, scan compression, Boundary Scan (JTAG) and undergoing ATPG Tools used: Scan insertion: DFT compiler Scan compression: DFT complier Boundary Scan (JTAG): BSD complier ATPG: TetramaxSimulation: VCSTraining included projects w.r.t scan insertion, scan insertion with compression, boundary scan(JTAG), ATPG Pattern generation and Simulation along with analysis of DRC violations and fixing using Synopsys Tool

Experience

  1. Dft Engineer

    Qualcomm

    Mar 2022 — Present · Bengaluru, IN

Education

  • Visvesvaraya Technological University

    Bachelor of Engineering - BE, Electrical and Electronics Engineering

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Anusha Naganur — Dft Engineer at Qualcomm in Bengaluru, KA, IN | Unifers