Anuroop Vuppala
SRAM , Register File circuit design in advanced technology nodes.
- Role
- Principal Engineer, Sram Design at NVIDIA
- Location
- Mountain View, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Anuroop Vuppala
Experienced Circuit Designer with a demonstrated history of working in the electronics industry. Strong engineering professional skilled in Semiconductors, SRAM, Register File design in latest technologies.
Experience
Principal Engineer, Sram Design
May 2024 — Present · Santa Clara, CA, US
Education
Birla Institute of Technology and Science, Pilani
Masters
2008 — 2010
National Institute of Technology Warangal
B.Tech
2002 — 2006
Dr.S R K High School
SSC
2000 — 2000
Sasi Residential Junior College
10+2
2000 — 2002
Skills
- Circuit Design
- Semiconductors
- Static Timing Analysis
- Ic
- C
- Asic
- Debugging
- Low-Power Design
- Cmos
- Perl
- Tcam
- Sram
- Cadence Virtuoso
- Vlsi
- C++
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