Anurag Verma
Graphic Hardware Engineer at Intel Corporation
- Role
- Graphic Hardware Engineer at Intel
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Anurag Verma
As a Physical Design Engineer my work involves- 1. Converging complex partitions of…
Experience
Graphic Hardware Engineer
Sep 2015 — Present · Bangalore, IN
As a part of SD(Structural Design) Team, I am involved in –1. Converging complex partitions of latest gen-graphics core with multi-million gate count for timing and shorts as Partition Execution Owner (PEO) of 14nm Technology node.2. Converging partitions includes the synthesized Netlist to GDS-II file through the Placement, CTS, Routing and Post Route Flow.3. PnR flow execution using Synopsys Design Compiler and IC compiler.4. Implementing functional ECO including swap, buffer insertion and rerouting nets. Layout Verification (DRC, LVS, Antenna Violation, Density Issues) on Synopsys icv tool. Tap-in 3 partition for 14nm technology node.
Education
H.R Institute of Technology, Ghaziabad
Bachelor of Technology (B.Tech.)
2008 — 2012
Vellore Institute of Technology
Master's degree
2013 — 2015
Birla Public School, Pilani
Higher Secondary (XII)
2005 — 2007
Skills
- C
- Perl
- Matlab
- C++
- Embedded Systems
- Layout
- Microsoft Excel
- Very-Large-Scale Integration (Vlsi)
- Asic
- Vlsi
- Verilog Hdl
- Microsoft Office
- Cadence Virtuoso
- Integrated Circuit Design
- Verilog
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