Anurag Ajmera

About Anurag Ajmera

12 years of experience in semiconductor back-end, delivering 15+ successful tape-outs.• Extensive expertise in leading-edge technologies (4nm to 90nm), mastering design flows and methodologies.• Deep knowledge and work experience in RHSC / IR Drop Analysis, Low Power integrity checks.• Highly skilled in IC chip integration: floor planning, power planning, place and route, timing sign-off, physical verification, and SI analysis.• Hands-on design implementation using Synopsys ICC II/FC and Cadence Innovus, proficient in Linux and TCL scripting.• Expertise in Perl scripting. Developed many Automation scripts for multiple teams which ease the task of reporting and analysing the data.• Enjoys being part of the team and thrives in high pressure and challenging working environments.

Experience

1. Senior Staff Engineer

   Samsung Semiconductor

   Nov 2022 — Present · Bangalore Urban, IN

Education

• Pratap Public School, karnal

  12 Th Pass, Engineering

  1998 — 2009

• Institute of Technology and Management

  B-Tech, Electronics and Communication

  2009 — 2013

• Birla Institute of Technology and Science, Pilani

  Master of Technology - MTech, Data Science and Engineering

  2021 — 2023

• HEP

  Hardware verification trainee, EDA (VLSI)

  2012 — 2012

Skills

• C and C++
• Microcontrollers
• Vhdl
• Simulations
• Rf
• Linux
• Modelsim
• Cryptography(Rsa)
• Microprocessors
• Functional Verification
• Soc
• Vlsi
• Logic Synthesis
• Hardware Architecture
• Unix
• Open Verification Methodology
• C++
• Verilog
• Static Timing Analysis
• Digital Electronics
• Perl
• Eda
• Rtl Design
• Physical Design
• Gsm
• Shell Scripting
• Very-Large-Scale Integration (Vlsi)
• Embedded C
• Assembly Language
• Systemverilog
• Xilinx Ise