Anurag Agarwal

About Anurag Agarwal

9 years of experience in Structural Verification of memories - Memory Built-In Self Test (MBIST). Worked on various aspects of Memory testing - insertion, repair, RTL/GLS verification, post silicon debugs, algorithms. Worked on MBIST tools like SMS/LVISION. Also worked on scan insertion & ATPG bring up at core level.* Worked as MBIST lead for various Projects in snapdragon, Modem and automotive product lines handling from RTL to silicon.* Memory BIST insertion at SoC Design & IP level cores.* Complex IP’s with shared bus interface insertion and verification using LV and MMB tool.* Requirements of Custom algorithm, and coverage analysis*Timing and zero delay simulations* Post silicon debugs and yield improvement on both ATE & SLT platforms.* Tic based Simulations for Memory Controller\'s across Voltage corners.*Worked on automotive enhancements for in system bist design and debugs at pre and post silicon including pattern delivery & simulations.* Automation scripts in perl to reduce manual efforts and enhance quality of RTL & Acheive 100% FTR

Experience

1. Staff Engineer

   Qualcomm

   Nov 2024 — Present · Bengaluru, IN

Education

• The Scholar

  High School, Early Childhood Education

  2005 — 2009

• Motilal Nehru National Institute Of Technology

  Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering