Anupriya
IP Verification Engineer, INTEL
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anupriya
Hi, I\'m an IP Pre Si Validation engineer. Interested in science.
Experience
Soc Design Engineer
Jul 2024 — Present · Bengaluru, IN
IP Pre - Si Validation Engineer ->Worked on UCIe protocol, UCIe IP Debug capabilities feature verification using UVM->Experience in functional coverage for IP features->languages : SVA, UVM, Perl
Education
Kendriya vidyalaya
Science & Mathematics
Self-Introspection
Career Introspection
2021 — 2022
Delhi Technological University (Formerly DCE)
Master's degree (full time)
2022 — 2024
Mugneeram Bangur Memorial University (M.B.M University)
Bachelor of Engineering
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