Anupam Das
Senior ASIC Engineer - DFT/IST/SLM/SLS at NVIDIA
- Role
- Senior Asic Engineer - Dft Ist at Nvidia at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anupam Das
As a Senior ASIC Engineer with more than 9 years of experience in the semiconductor industry, I possess expertise in both DFT Verification and project leadership. I am highly skilled in Verilog, Perl, System Verilog, ATPG, Clock Verif, Testplan Design, Soc Verif, Linux, Perforce, In System Testing, and Silicon Debug, among other industry-standard methodologies and tools. My track record of leading successful verification projects and teams showcases my proficiency in cutting-edge semiconductor chip design and implementation. With a Bachelor of Technology (B.Tech.) in Electrical and Electronics Engineering from the National Institute of Technology Tiruchirappalli, I am well-equipped to contribute significantly as an experienced DFT/IST Design verification lead in the industry.
Experience
Senior Asic Engineer - Dft Ist at Nvidia
Jun 2022 — Present · IN
Leading the Pre-Silicon and Post Silicon In-System Test (IST) verification of next-generation high-performance SOC designs, with a focus on meeting ASIL (ISO 26262) requirements. Specifically, verified custom DFT (Design For Test) features, clocks, scan isolation, and IST backbone (PCIe/UFS/eMMC), as well as microarchitecture and logic. Developed and executed verification test plans at different levels of design hierarchy, including super unit and full chip environments, utilizing the latest simulation technologies, such as PAV, XPROP, and regular simulation. Developed testbench components, including stimulus drivers, monitors, and checkers. Identified design bugs and worked with RTL/Arch owners to resolve all failures and discrepancies. Participated in technical reviews of specifications, designs, and test plans, and identified areas of concern to meet design quality objectives. Managed the assignment and execution of verification tasks with a small team of verification engineers.
Education
Kendriya Vidyalaya
Higher Secondary, Science
2009 — 2013
National Institute of Technology, Tiruchirappalli
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering
2013 — 2017
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