Anup George A M
Cadence
San Jose, CA, US
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Present
@Cadence
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SKILLS
DesignApbUsbVirtex 7AxiClpTetramaxVivadoDdr ControllerJasper GoldVerilogCdc AnalysisDc CompilerTeamworkFpgaNetwork Inter ConnectBoundary ScanSocAsicSpyglassArmDmaRtl DesignIntegrationSerdesC++Research and Development (R&D)Dft CompilerDftEngineeringLteLintApplication-Specific Integrated Circuits (Asic)DebuggingGate Level SimulationVirtex 6DdrDigital DesignsDesign Constraints SdcMulti Channel Dma
ABOUT ANUP GEORGE A M
Digital logic design engineer with 10+ years of experience. Worked in ASIC Design areas…
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