Anshul Sirohi
Layout Manager at Texas Instruments
- Role
- Io & Non-volatile Memory Layout Design Manager at Texas Instruments
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Anshul Sirohi
Experienced in design of layouts for analog and mixed signal IOs in 28nm, 45nm, 65nm, 90nm, 130nm node technologies. Expert in physical verification checks like LVS, DRC, ERC, DFM, antenna DRC, IP tiling. Responsible for Block level and top level layout design meeting design constraints.
Experience
Io & Non-volatile Memory Layout Design Manager
Jul 2024 — Present
Education
JSS ACADEMY OF TECHNICAL EDUCATION, NOIDA
Bachelor's degree
2011 — 2015
Skills
- Cadence Virtuoso
- Very-Large-Scale Integration (Vlsi)
- Floorplanning
- Debugging
- Ic Layout
- Eda
- Drc
- Cmos
- Mixed Signal
- Analog
- Vlsi
- Place & Route
- Lvs
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