Annapurna Rallabandi
Design Verification Engineer | DMS
- Role
- Design Verification Engineer at Texas Instruments
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Annapurna Rallabandi
As a Digital Engineer at Texas Instruments, I apply my Master\'s degree in VLSI Design and my skills in Verilog, VLSI, and MATLAB to design, simulate, test, and debug digital circuits and systems for various applications. I have been working in this role for more than 5 years, and I have contributed to multiple projects involving high-performance, low-power, and mixed-signal designs. My goal is to continue learning and growing as a professional and as a leader in the field of VLSI design.
Experience
Design Verification Engineer
Jul 2018 — Present · Bengaluru, IN
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