Anna Lakshmi S
SoC Logic Design Engineer at Intel Corporation
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anna Lakshmi S
ASIC Design engineer with more than 6 years of experience in verilog RTL design. Skills Experienced in: Micro-Architecture development RTL coding Linting CDC Synthesis Simulation and Debugging Basics of STA UPF Protocols : PCIe, I2C, MIPI_I3C, AMBA-APB, AMBA - AXIRTL related Logic Equivalence ChecksTools Experienced in: Simulation tools : Synopsys VCS,Cadence NC-Sim Linting tools : Novas Lint, Spyglass Lint, Conformal Lint, VC Lint CDC tool : Spyglass CDC, VC CDC Logic Synthesis tools : Design Compiler(DC), RTL Compiler(RC), Fusion Compiler Low power tools : VCLP Logic Equivalence Check : Conformal FEV
Experience
Soc Design Engineer
May 2022 — Present · Bengaluru, IN
Education
Government Higher Secondary School
High School
2007 — 2014
National Engineering College,Kovilpatti
Bachelor's degree
2014 — 2018
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