Ankita Arya

About Ankita Arya

Looking for full-time roles in Functional Verification, Design Verification, or UPF Low Power verification flows- Hardware Verification Engineer with expertise in functional verification and low-power methodologies, with 9 years of extensive industry experience (6+ years with Qualcomm and 3 years with ST Microelectronics)- Demonstrated experience in IP-level Functional Verification - Specification understanding, spec to test-plan mapping, UVM environment creation, Functional Verification, SV Assertions and coverage, Regression management- Experience in Low Power (UPF) Verification at block level for both Hard and Soft Macros, and creating tool-agnostic Low Power verification methodologies- Skills:• Languages: Verilog, System Verilog, UVM, SVA and coverage, Unified Power Format (UPF 2.0/3.0), C• Scripting: Perl, Shell• Tools: VCS, Questasim, VCS/NCSIM/QUESTASIM– NLP (Native low power), Verdi- MS in ECE from University of California, Santa Barbara - Major in VLSI and CAD, Minor in Computer Architecture.

Experience

1. Design Verification Engineer

   Apple

   Aug 2021 — Present · San Diego, CA, US

Education

• Netaji Subhas Institute of Technology

  Bachelor of Engineering - BE, Instrumentation and Control Engineering

  2006 — 2010

• UC Santa Barbara

  Master of Science - MS, Electrical and Computer Engineering

  2013 — 2014

Skills

• Computer Architecture
• C
• Ncsim
• Cmos
• Systemverilog
• Vlsi
• Soc
• Logic Synthesis
• Functional Verification
• Integrated Circuit Design
• Simulations
• Verilog
• Rtl Design
• Cadence
• Asic
• Embedded Systems
• Eda
• C++