Ankit Patiyal
Design Verification Engineer at Analog Devices || Ex-Intern at NXP Semiconductors || M.Tech VLSI @ IIT Mandi (22-24)
- Role
- Design Verification Engineer at Analog Devices
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Ankit Patiyal
I am a Design Verification engineer with around 3 years of experience. I am currently…
Experience
Design Verification Engineer
Sep 2024 — Present · Bengaluru, IN
Working on pre-silicon verification of automotive SerDes based chips
Education
D.A.V. Public School - India
12TH
2016 — 2017
D.A.V. Public School - India
High School Diploma
2014 — 2015
National Institute of Technology, Andhra Pradesh
B. Tech
2017 — 2021
Indian Institute of Technology, Mandi
M.Tech
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.