Ankit Kumar Jha
- Role
- Senior Lead Engineer at Qualcomm
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Senior Lead Engineer
Jul 2021 — Present
Physical design and physical verification
Skills
- Cadence
- Integrated Circuit Design
- Very-Large-Scale Integration (Vlsi)
- Eda
- Design Rule Checking (Drc)
- Digital Electronics
- Microprocessors
- Integrated Circuits (Ic)
- Ams
- Icc
- Analog Circuit Design
- Cmos
- Analog Layout
- Semiconductors
- Field-Programmable Gate Arrays (Fpga)
- Application-Specific Integrated Circuits (Asic)
- C
- Layout Versus Schematic (Lvs)
- Cadence Virtuoso
- Tcl
- Embedded Systems
- Verilog
- C++
- Physical Verification
- Synopsys Tools
- System on a Chip (Soc)
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