Ankit Kumar

About Ankit Kumar

I am an MTech student and aspiring VLSI engineer with hands-on experience in FPGA-based system design, RTL development, and control-path architecture. I enjoy designing efficient RTL architectures for real-time and communication-based hardware systems.Previously, I worked as a Project Scientist at IIT Delhi, where I gained strong practical exposure to Zynq-based SoC platforms. My work involved designing and optimizing control and datapath logic for real-time applications with hardware–software integration at Physical layer for the Project Lifi Networks.Currently, I am an Intern at STMicroelectronics, where I am enhancing my understanding of industry-standard design methodologies, timing constraints, and verification workflows.Core skills include Verilog, SystemVerilog, UVM, AXI-Stream, SPI, I²C, UART, and experience with Zynq and Zynq UltraScale+ platforms.I am eager to continue learning and contributing to FPGA/ASIC design and SoC verification roles by building reliable and optimized hardware architectures.

Experience

1. Design Engineer

   STMicroelectronics

   Jan 2026 — Present · Noida, IN

Education

• National Institute of Technology Rourkela

  Master of Technology - MTech, Electronics and communication engineering

• Bennett University

  Bachelor of Technology - BTech, Electronics and Communications Engineering

  2019 — 2023