Ankan Sinha

Senior Principal Design Engineer @ Cadence | SERDES, Analog & Mixed Signal IP Characterisation|SI|H/W Design

Role
Senior Principal Design Engineer at Cadence
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Ankan Sinha

I have around 15+ years of experience in Post Silicon Validation/ High Speed Board…

Experience

  1. Senior Principal Design Engineer

    Cadence

    Oct 2024 — Present

    Working on validating PCIe Gen 6-7 and other lower GENs

Skills

  • Orcad
  • Field-Programmable Gate Arrays (Fpga)
  • Signal Integrity
  • Vlsi
  • Eda
  • I2c
  • Hardware Architecture
  • Pcie
  • Application-Specific Integrated Circuits (Asic)
  • Digital Signal Processors
  • Python
  • Board Bring-Up
  • Fpga
  • Asic
  • Spi
  • Arm
  • Verilog
  • Validation
  • Processors
  • Microcontrollers
  • Integrated Circuits (Ic)
  • Debugging
  • Pcb Design
  • Ethernet
  • Hardware Design
  • Very-Large-Scale Integration (Vlsi)
  • Simulations
  • Soc
  • Digital Electronics
  • Ic
  • Arm Architecture
  • Board Development
  • Analog
  • Mixed Signal
  • Testing
  • Usb

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Ankan Sinha — Senior Principal Design Engineer at Cadence in Bengaluru, KA, IN | Unifers