Anjali Arora
Senior Design Engineer at Arm
- Role
- Senior Design Engineer at Arm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anjali Arora
Working experience in memory design covering various types of memory compilers such as SRAM single port compiler, register file (RF compiler) & RF2P compiler design on various technology nodes including 2nm, 11nm, 14nm, 18nm (FDSOI), 22nm, 28nm, 55nm & 110nm (Including mix Vts design) for Dongbu, Global Foundries, TSMC, STMicroelectronics and SAMSUNG foundries.Roles and responsibilities Done all the activites related to compiler design development like Margin Analysis, Fixing Setup and Hold & Write assist tuning.• Dual rail with mix Vts design implementation for low power and leakage consumption.( supporting DVFS on system on chip)• WRM, ADM, Iread, level shifter analysis, CCK, ESPCV.• Working Experience in characterisation, checking trends across PVTs (UTC).lib Data analysis (DA) and design validation ( DV)• Resource handling and enabling freshers.• Having Good understanding of Memory Architectures, Static timing analysis.
Experience
Senior Design Engineer
Apr 2022 — Present · Bengaluru, IN
Education
Indira Gandhi Delhi Technical University for Women
Master of Technology (M.Tech.), VLSI Design
2015 — 2017
Graphic Era Deemed to be University
Bachelor of Technology (B.Tech.), Electronics and Communication
2011 — 2015
S. D. Modern Public School, Hansi
Intermediate, Physics, Chemistry, Maths
2010 — 2011
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