Anisha Sharma
Soc Design engineer at Intel corporation
- Role
- Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Anisha Sharma
Designing for debug which involves post silicon debug
Experience
Design Engineer
Sep 2017 — Present
Education
Visvesvaraya Technological University
Electrical, Electronics and Communications Engineering
2005 — 2009
School of Information Science, Manipal
Master of engineering, Vlsi design
2015 — 2017
Skills
- System Verilog
- Synopsys Icc
- Perl
- Testing
- Cadence Virtuoso
- Verilog
- C
- Synopsys Dct
- Static Timing Analysis
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