Anirudh Yajurvedi
Senior Design Verification Engineer at NVIDIA
- Role
- Senior Design Verification Engineer at NVIDIA
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Anirudh Yajurvedi
Skills-Experience with development of UVM based test benches for block verification and SoC verification.Knowledge of computer architecture.Experienced in VHDL/Verilog based RTL design and integration. Hands on experience in RTL synthesis, STA using Xilinx ISE(Synthesis, P&R), FPGA board bringup.
Experience
Senior Design Verification Engineer
Jan 2022 — Present · San Francisco, CA, US
Education
Sri Jayachamarajendra College Of Engineering
Bachelor of Engineering (BE)
2008 — 2012
University of Minnesota
Master's Degree, Electrical Engineering
2014 — 2016
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.