Anil Mukkamala
Principal Engineer, Static Timing Analysis at Marvell
- Role
- Principal Engineer, Static Timing Analysis at Marvell Technology
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Anil Mukkamala
Results-driven ASIC Physical Design and STA Engineer with over 20 years of progressive experience in the semiconductor industry and substantial success in overseeing large-scale ASIC and SoC designs. Experience includes graphics design, full-chip integration, block level, subsystems and full-chip STA, MCMM, Electromigration, Self-Heat, IR-Drop, pre-silicon verification and RTL design, Floorplan optimization, Power optimization as well as Synopsys flows from Netlist-to-GDS. Applies an analytical approach to solve problems, ensures project delivery on time and within budget and inspires technical teams to success. Communicates effectively at all levels and cultivates trusted relationships with key stakeholders including Technology and Automation teams as well as with Design Owners and Project Managers. Expert hands-on user on Synopsys and Redhawk tools & flows.
Experience
Principal Engineer, Static Timing Analysis
Dec 2025 — Present · Austin, TX, US
Education
Bangalore University
Bachelors in Engineering, Electronics
1990 — 1994
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