Aniket Shelar
Staff R&D Engineer | Analog Circuit Design| MTECH (VLSI)
- Role
- Staff R & d Engineer at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Aniket Shelar
Currently working fulltime as a Staff R&D Engineer @ Synopsys in Circuit Design & TCAD Solutions Team which is now Silicon Technology Group.2. Worked as Project Lead @ TechM Cerium to co-ordinate, utilize, track a team of engineers. As a Individual contributor currently working on Transmitter blocks like Serializer, Clocking, DCC etc to support PCIe_GEN6 PAM-4 64Gbps & NRZ 32Gbps PHY.3. Worked as Sr. Analog Design Engineer @ TechM Cerium in High Speed D-PHY based MIPI & High Speed IO based TBT, USB, DP, HDMI, PCIE TX/RX architectures using lower technology nodes 14nm, 10nm,7nm FinFETs.4. Former IO Design/ Validation Trainee at STMicroelectronics India (I2C,SD-MMC,BIDERS,GPIO etc)5. Block ownership for High Speed Driver, Parallel to Serial converters, hsrxclktop, hsrxdatatop, LDO, Level Shifters, Comparators, DLL, DCC, CTLE, Pre-drivers etc.Professional Summary:• Design and develop complex mixed signal circuitry supporting High speed SERDES Design, CoreAnalog & General Purpose I/O blocks in various process nodes.• Involved in circuit design updates based on process/performance/age/eos/rv related spec violations.• Working closely with other cross-functional teams for design sign-off.• Define layout constraints and suggest fixes based on simulation & reliability post layout results.• Replicate Post-Silicon findings in Simulation Environment with channel and related components.• Experienced to work in multiple projects with available resources, timelines, and challenges of lower technology node.Programming Languages Known : Verilog HDL,PERL,TCL,UNIX,C,C++Exposure to following EDA Tools:• Cadence Virtuoso ADE, ADEXL, Maestro, Verifier• Synopsys Custom Compiler, PRIMESIM, HSPICE, FINESIM• ELDO, SPECTRE, LYNX
Experience
Staff R & d Engineer
Feb 2024 — Present · Bengaluru, IN
Education
Vellore Institute of Technology, Chennai
Master’s Degree, VLSI Design
2014 — 2016
Karjat Education Society's English Medium School
SSC
2007
CHM college
HSC, Science
2007 — 2009
MUMBAI UNIVERSITY
Engineer's Degree, Electronics and Telecommunication
2009 — 2013
Skills
- Microsoft Excel
- Asic Design
- Linux
- Unix
- Cadence Spectre
- Perl
- Embedded Systems
- Eda
- Xilinx
- Design Rule Checking (Drc)
- C++
- Eda Tools Like Cadence, Xylinx,Mentorgraphics
- Layout Versus Schematic (Lvs)
- Rtl Design
- Verilog
- Integrated Circuit Design
- Analog Circuit Design
- C
- Cadence Encounter
- Cmos
- Microsoft Office
- Vlsi
- Scripting Langauges
- Tcl
- Cadence Virtuoso
- Matlab
- Spice
- Eldo
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