Anees T
Layout Design Staff Engineer
- Role
- Layout Design Staff Engineer at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anees T
Having 7 years of experience in Analog and Mixed-signal Layout Design.Technologies handled : 28nm, 10nm, 7nm, 5nm.Worked Sub_blocks of IPs such as PLL, DLL, LDO, ESD.Worked on ESD, OpAmp, LevelShifter, Power_Switch, Counter etc.Worked on matching pair, ESD connections etc.Challenges of Floorplan, Area concept, DRC cleaning,Antenna DRC handled.Familier with Calibre DRC LVS DecompUtility ERC Softcheck
Experience
Layout Design Staff Engineer
Apr 2024 — Present · Bengaluru, IN
Education
Ilahia College of Engg. and Technology, Mulavoor P.O., Muvattupuzha, Ernakulam- 686 673
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
2011 — 2015
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