Aneek Jash
Intel, IIT Delhi \'23 , NIT Dgp \'21
- Role
- Circuit Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Aneek Jash
Working on standard cell design, dynamic simulations and characterization.
Experience
Circuit Design Engineer
Aug 2023 — Present · Bengaluru, IN
Standard Cell design, dynamic simulations, functional checks and characterization. Custom IP design for metal R/C correlation btw pdk and silicon. RV simulations on cells/block.
Education
Indian Institute of Technology, Delhi
M.Tech
2021 — 2023
National Institute of Technology Durgapur
B.Tech
2017 — 2021
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