Andrew Ryan

Senior Process Development Engineer (Etch and Integration)

Role
Dry Etch Senior Staff Engineer and Feol Etch Process Development Lead at Intel
Location
Tempe, AZ, US
LinkedIn followers
500 followers

About Andrew Ryan

Senior semiconductor process development leader with 15+ years of experience spanning Dry Etch process development, Process Integration, engineering management, yield optimization, and high‑volume manufacturing (HVM). Proven owner of TD to HVM transitions, process/yield optimization, manufacturability, and process customization for advanced logic nodes. Recognized technical leader bridging dry etch, process integration, yield, and data analytics teams to deliver scalable, customer‑ready manufacturing solutions in a Foundry.

Experience

  1. Dry Etch Senior Staff Engineer and Feol Etch Process Development Lead

    Intel

    Jul 2009 — Present · Phoenix, AZ, US

    Senior semiconductor process development leader with 15+ years of experience spanning Dry Etch process development, Process Integration, engineering management, yield optimization, and high‑volume manufacturing (HVM). Proven owner of TD to HVM transitions, process/yield optimization, manufacturability, and process customization for advanced logic nodes. Recognized technical leader bridging dry etch, process integration, yield, and data analytics teams to deliver scalable, customer‑ready manufacturing solutions in a Foundry.Senior technical leader responsible for integration focused FEOL Etch process development, yield optimization, and manufacturing readiness across emerging foundry and IDM technology nodes.

Education

  • Monroe Community College

    Associates Degree, Engineering Sciences

    2004 — 2006

  • Rochester Institute of Technology

    BS, Microelectronic Engineering

Skills

  • Process Integration
  • Research and Development (R&D)
  • Photolithography
  • Statistics
  • Mems
  • Finfets
  • Silicon
  • Yield
  • Jmp
  • Cost Reduction Solutions
  • Creative Problem Solving
  • Yield Improvement
  • R&D
  • Metrology
  • Cvd
  • Cmos
  • Spc
  • Statistical Process Control (Spc)
  • Dry Etch
  • Design of Experiments
  • Manufacturing
  • Thin Films
  • Lithography
  • Diffusion
  • Transmission Electron Microscopy
  • Scanning Electron Microscopy
  • Semiconductors
  • Plasma Etch
  • Microfabrication

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Andrew Ryan — Dry Etch Senior Staff Engineer and Feol Etch Process Development Lead at Intel in Tempe, AZ, US | Unifers