Andrew Varghese
- Role
- Senior Asic Verification Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
Experience
Senior Asic Verification Engineer
May 2014 — Present
Education
University of Southern California
Master of Science (MS), Electrical and Electronics Engineering
2012 — 2014
Cochin University of Science and Technology
Btech, Electronics and Communication Engineering
2006 — 2010
Skills
- Hardware Architecture
- Fpga
- Rtl Design
- Orcad
- Rtl Coding
- Embedded Systems
- Microprocessors
- Pspice
- Xilinx
- Signal Integrity
- Orcad Capture
- Debugging
- Verilog
- Cadence Virtuoso
- Vlsi
- Vhdl
- Computer Architecture
- Microcontrollers
- Modelsim
- Integrated Circuit Design
- High Speed Design
- Arm
- Pcb Design
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