Andrew Gunawan
Design Verification @ SpaceX
- Role
- Asic Fpga Design Verification Engineer at SpaceX
- Location
- Seattle, WA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
About Andrew Gunawan
Dedicated, hard-working engineer with 6+ years of competitive robotics and extensive…
Experience
Asic Fpga Design Verification Engineer
Aug 2024 — Present · Redmond, WA, US
Developed UVM testbenches to aid in design verification of custom Starlink silicon chips found in the next generation of Starlink satellites, gateways, and user terminals.
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