Andrew Tran

Developing ASICs for network switches, AI devices, PCIe/CXL interconnects and memory systems.

Role
Distinguished Mts at Astera Labs
Location
San Francisco, CA, US
LinkedIn followers
500 followers

About Andrew Tran

Specialties: ASIC/FPGA architectures and designs, reconfigurable SoCs, network switches…

Experience

  1. Distinguished Mts

    Astera Labs

    Mar 2020 — Present · San Francisco, CA, US

    Making high speed connectivity solutions and low latency memory chips for data centers. We’re hiring digital design, verification and firmware engineers.

Education

  • Posts and Telecommunications Institue of Technology, HCMC, Vietnam

    Bachelor of Science (B.S.), Electronics Engineering

    1998 — 2003

  • University of California, Davis

    Master of Science (M.S.), Electrical Engineering

    2006 — 2009

  • University of Technology, HCMC, Vietnam

    Software Engineering

    1997 — 1999

  • University of California, Davis

    Doctor of Philosophy (Ph.D.), Electrical Engineering

    2009 — 2012

  • VNU-HCM High School for the Gifted

    High School, Mathematics

    1994 — 1996

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