Sai Tejaswini Andem
\"Goal-Oriented ECE Graduate Seeking Internship | Skilled in VLSI , Advanced Digital Circuits , VLSI Testing
- Role
- Machine Learning Intern at Keysight Technologies
- Location
- Clovis, CA, US
- LinkedIn followers
- 500 followers
About Sai Tejaswini Andem
Technology has always been more than just circuits and code for me—it\'s a language that transforms ideas into reality. As a graduate student in Electrical and Computer Engineering, I thrive at the intersection of hardware innovation, FPGA design, and embedded systems, driven by a relentless curiosity to push technological boundaries.From designing floating-point arithmetic units for FPGA-based systems to integrating AI into embedded platforms, my journey has been defined by a deep passion for problem-solving and optimization. During my internships at Defense Research and Development Organization (DRDO) and Coincent in association with Microsoft, I worked on cutting-edge defense systems, AI-driven chatbots, and real-time electronic testing, sharpening my ability to navigate complex engineering challenges in high-stakes environments.Beyond technical expertise, I believe that true innovation stems from collaboration, adaptability, and a vision for impact. My role as a Learning Assistant at California State University, Fresno, has reinforced my ability to break down complex concepts, mentor future engineers, and constantly challenge myself to think beyond conventional solutions. Certified in: Microsoft Azure AI, Digital IC Design, Linux System Administration, UVM & Protium (Cadence) Passionate About: FPGA optimization, hardware acceleration, AI-embedded systems, and high-performance digital architectures Seeking: Internship opportunities in hardware development, embedded systems, FPGA design, and digital computing, where I can contribute fresh perspectives, tackle ambitious projects, and gain transformative hands-on experience.Let’s connect and shape the future of hardware-driven intelligence together!
Experience
Machine Learning Intern
May 2025 — Present · US
chiplet solution enablement.My tasks include the characterization of a UCIe test chip from Alphawave Semi and the development of a model to predict on-die performance.
Education
California State University Fresno
Masters Degree, Electrical and Computer Engineering
2024 — 2026
Jawaharlal Nehru Technological University Hyderabad Jntuh
Bachelor of Technology, Electrical Electronics and Communications Engineering
2020 — 2024
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