Anchit Singhal
Process Engineer | Intel Corporation
- Role
- Process Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Anchit Singhal
I am a technology professional with a strong background in semiconductor R&D and advanced data analytics, currently driving impact through process innovation and business-focused problem solving. At Intel, I worked across manufacturing, process engineering, and data modeling—leveraging statistical analysis, experiment design, and visualization tools (Power BI, JMP) to optimize yield, quality, and efficiency.My expertise lies in bridging technical rigor with strategic insight: transforming complex data into actionable recommendations, aligning cross-functional teams, and designing scalable solutions that deliver measurable improvements to key performance metrics. I excel at connecting R&D, analytics, and strategy to translate technical expertise into tangible business outcomes.Looking ahead, I am passionate about contributing to organizations that are shaping the future of technology, using data-driven insights and innovation to unlock growth and long-term competitive advantage.
Experience
Process Engineer
Jan 2023 — Present · Hillsboro, OR, US
Ensure output quality meets 99.7% accuracy by designing and executing experiments to optimize semiconductor resistivity and improve yield. Enhance KPIs like safety, quality, and cost by leading continuous improvement initiatives.Facilitate strategic decision-making using JMP, SQL, and Power BI to extract data, isolate anomalies and identify patterns in process data. Qualify and standardize performance on new process technology to meet specifications.Drive annual cost savings of approximately $250K by collaborating cross-functionally to address product defects, aligning teams on preventive strategies, and communicating insights to both technical and business stakeholders.Develop problem solving models to detect equipment faults and translate them into actionable plans and recommendations, leading to manufacturing availability of 80 +/- 10% each quarter.Maximized fab output of about wafers per shift by rapidly troubleshooting semiconductor equipment faults and factory automation issues, reducing unplanned downtime by 10-15%. Implement automated operation lockouts based on SPC (Statistical Process Control) results, preventing excursions and ensuring process stability.
Education
Carnegie Mellon University
Master of Science - MS, Chemical Engineering
Indian Institute of Technology (Indian School of Mines), Dhanbad
Bachelor of Technology, Chemical Engineering
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