Ananthi Manokaran
Design and Verification Engineer
- Role
- Design and Verification Engineer at Capgemini Engineering
- Location
- Coimbatore, TN, IN
- LinkedIn followers
- 500 followers
About Ananthi Manokaran
As an FPGA RTL Design Engineer, I bring nearly four years of valuable experience to the table. My expertise encompasses RTL programming using Verilog, VHDL and CDC (Clock Domain Crossing) considerations. I have hands-on experience with real-time debugging using tools like Xilinx Chipscope, and I\'m proficient with industry-standard software, including Xilinx 14.7, Vivado 2021.2 and Vitis AI. Alongside this, I\'ve actively worked with C programming and have a strong command of Python. Furthermore, I\'m well-versed in communication protocols such as UART,SPI, AMBA- AXI, Ethernet and I possess theoretical knowledge of I2C, CAN. I\'m driven by a passion for pushing the boundaries of FPGA technology and thrive on contributing to cutting-edge projects.
Experience
Design and Verification Engineer
Feb 2024 — Present · Chennai, IN
Education
Sri Ramakrishna Engineering College
Bachelor of Engineering - BE
2015 — 2019
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