Ananth Vijalapuram
- Role
- Soc Design Engineering Manager at Intel
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Ananth Vijalapuram
Versatile and experienced SoC/IP Design Verification Engineer with over 23 years of…
Experience
Soc Design Engineering Manager
Dec 2021 — Present
Skills
- Tcl
- Mixed Signal
- Microprocessors
- Modelsim
- Microarchitecture
- Digital Signal Processors
- Networking Skills
- Integrated Circuit Design
- Vlsi
- Power Management
- Asic
- System on a Chip (Soc)
- Fpga
- Systemverilog
- Verilog
- Integrated Circuits (Ic)
- Application-Specific Integrated Circuits (Asic)
- Vmm
- Semiconductors
- Debugging
- Arm
- Amba Ahb
- Simulations
- Logic Design
- Cadence
- Management
- Functional Verification
- Processors
- Ic
- Cmos
- Eda
- Soc
- Vhdl
- Hardware Architecture
- Computer Architecture
- Low-Power Design
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