Anand Saurabh
RTL Design Engineer
- Role
- Rtl Design Engineer at Samsung Semiconductor
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anand Saurabh
I am a Result-driven professional holding Masters in Microelectronics & VLSI from IIT Kharagpur having 2 years of experience (Out of Total 3+ years) in RTL Design, Verilog, VHDL, Static Timing Analysis, Clock Domain Crossing methodologies and using VIVADO and Questasim for FPGA design and simulation.
Experience
Rtl Design Engineer
May 2024 — Present · Bengaluru, IN
Education
Indian Institute of Technology, Guwahati
Bachelor of Technology - BTech, Electronics and communication Engineering
Indian Institute of Technology, Kharagpur
Master of Technology - MTech, Microelectronics and VLSI
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