Anand Ratna Arun
Research Scientist @Applied Materials India
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WORK HISTORY
Research Scientist @Applied Materials India
Mumbai, IN
Development and optimization of advanced surface engineering and refurbishment processes for semiconductor equipment components- Drive coating and cleaning process improvements to enhance durability, contamination control, and lifecycle performance- Implement metrology-driven process monitoring and endpoint detection strategies to improve repeatability and process robustness- Apply statistical process control (SPC) and design of experiments (DOE) methodologies to establish stable process windows and reduce variability- Collaborate cross-functionally with engineering and service teams to translate R&D innovations into scalable, production-ready solutions.
EDUCATION
Regional Institute Of Education ,Manasagangothri Mysore
B.Sc.Ed., Physics, Chemistry, Mathematics
Indian Institute of Technology, Bombay
Doctor of Philosophy - PhD, Materials Science
Regional Institute Of Education ,Manasagangothri Mysore
Master of Science, Physics
ABOUT ANAND RATNA ARUN
I am a semiconductor process development professional currently working as a Research Scientist at Applied Materials India (Exploration Center Lab, IIT Bombay), where I work on surface engineering and refurbishment process optimization initiatives. My work focuses on coating development, cleaning process improvement, and metrology-driven process control to enhance component durability, contamination mitigation, and lifecycle performance in high-precision semiconductor equipment environments. In my current role, I apply statistical process control (SPC), design of experiments (DOE), and root-cause analysis methodologies to establish stable process windows and improve repeatability. I collaborate cross-functionally to translate R&D innovations into scalable, production-ready solutions- I completed my Ph.D. in Materials Science from IIT Bombay, where I developed deep expertise in CMOS fabrication and solid-state devices supported by advanced thin film deposition and characterization techniques. My doctoral research involved process integration of thin film based devices, with hands-on experience in CVD, PVD, RIE, photolithography, and precision patterning. I successfully optimized deposition, etching, and passivation processes to achieve high repeatability and device-level performance consistency- I am a hands-on engineer with strong process troubleshooting, tool commissioning, and experimental design capabilities. I have led installation and standardization of complex cluster deposition systems and established in-house thin film characterization facilities. My professional focus lies in process development, surface engineering, and data-driven optimization to build robust, manufacturable semiconductor technologies.
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