Anand Parameswaran
Senior Manager DDR Phy Firmware verification at Synopsys Inc
- Role
- Senior Manager Rnd at Synopsys Inc
- Location
- Mountain View, CA, US
- LinkedIn followers
- 500 followers
About Anand Parameswaran
Experienced and dynamic Logic design engineer with 6+ years in the semiconductor industry. A strong team player with outstanding communication skills, multi-tasking abilities, problem resolution abilities and a willingness to explore and learn new things.• Design tools: NCVerilog, MTI, VCS, Atrenta Spyglass CDC, Verdi. • Design Synthesis: Synopsys DesignCompiler, PowerComplier. • Programming Languages: Verilog, Python, SVAssertions.• Scripting Languages: Makefile, Perl, Unix shell scripting.• Bus protocols: OCP, AXI, AHB, APB.
Experience
Senior Manager Rnd
Jan 2025 — Present · San Francisco, CA, US
Leading a team of engineers to verify the Dram PHY training algorithms for DDR4/DDR5 Udimm/Rdimm/Lrdimm and MRDIMM across multiple product lines.
Education
University of Southern California
MS, EE VLSI
2005 — 2007
University of Mumbai
Bachelor of Engineering (BE), EE
2001 — 2004
Skills
- Verilog
- Python
- C++
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