Anand Bhatt

About Anand Bhatt

As a Senior Staff Engineer at Samsung Semiconductor, I work on RTL to GDS flow, applying my strong expertise in block level implementation in leading edge tech nodes. I joined Samsung in January 2024, after six years of experience as a Physical Design Engineer at Intel Corporation, where I worked on ASIC flow implementation for various tech nodes, including 5nm, 7nm, 10nm, and 22nm.I have a Master of Technology in VLSI and Embedded Systems from Dharmsinh Desai University, and a Bachelor of Technology in Electronics and Communication Engineering from VIT University. I have multiple certifications in Physical Design, and I am proficient in various physical design tools, such as Fusion Compiler, ICC2, Primetime, ICV, Calibre, Spyglass, Conformal, Cadence Virtuoso, and IC Workbench. I also have skills in scripting languages, such as TCL, PERL, SHELL, and SKILL. I am passionate about creating innovative and efficient solutions for complex design challenges, and I strive to learn and grow as a professional in the field of SOC physical design.

Experience

1. Senior Staff Engineer

   Samsung Semiconductor

   Jan 2025 — Present

   Working on Synthesis and PNR for high bandwidth memory.

Education

• Vellore Institute of Technology

  Master’s Degree, VLSI Design

  2014 — 2016

• S.V.Virani M. P. High School

  S.S.C, 10th

  2007 — 2008

• Dharmsinh Desai University

  Bachelor’s Degree, Electronics and Communications Engineering

  2010 — 2014

• G.K.Dholakiya School

  H.S.C, Science

  2008 — 2010

Skills

• Tcl-Tk
• Verilog
• Microsoft Word
• Cadence Virtuoso
• C
• Programming
• Microsoft Office
• Linux
• Modelsim
• Microcontrollers
• Cadence Virtuoso Layout Editor
• Rtl Verification
• Matlab
• Agilent Ads
• Assembly Language
• Rtl Coding
• Ael
• C++
• Perl