Anamika Sinha
Physical Design Timing Engineer
- Role
- Physical Design Timing Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Physical Design Timing Engineer
Mar 2021 — Present · Bengaluru, IN
Education
Indian Institute of Technology, Patna
Bachelor of Technology (B.Tech.)
2011 — 2015
St. Albert's High School Patna
High School
2000 — 2008
D.A.V. Public School BSEB Colony
Class 11th and 12th
2008 — 2010
Indian Institute of Technology, Madras
M.Tech
2017 — 2019
Skills
- Electrical Engineering
- Microsoft Word
- Electronics
- Matlab
- Vhdl
- Java
- C++
- C
- Programming
- Windows
- Management
- Powerpoint
- Microsoft Excel
- Engineering
- Microprocessors
- Autocad
- Microsoft Office
- Project Management
- Microcontrollers
- Instrumentation
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