Anamika Saikia
Pre Silicon Validation Engineer at Intel Corporation
- Role
- Pre Silicon Verification Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Anamika Saikia
IP Verification Engineer currently focused in developing testbench for different IPs for validation. Skilled in RTL and Gate level simulation. Passionate to learn new technologies and methodologies and use them to develop intelligent and efficient systems.
Experience
Pre Silicon Verification Engineer
Dec 2021 — Present · Bangalore Urban, IN
Education
North-Eastern Hill University
Bachelor of Technology (BTech), Electronics and Communications Engineering
Indian Institute of Technology (Indian School of Mines), Dhanbad
Master of Technology (MTech), ECE (VLSI Technology)
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