Amiya Ranjan Satapathy
Distingushed Engineer at Cadence Design Systems
- Role
- Distingushed Engineer at Cadence
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Amiya Ranjan Satapathy
An experienced EDA techno-manager with excellent skills in building cutting edge Simulation, Emulation and Synthesis engines, and proven record of making customers successful. Proficiency in Verilog, VHDL, C++, Synthesis, Logic optimization, Timing, partitioning, place and rout, firmware and HW emulation systems. Personally passionate about building stronger teams, robust leadership pipeline, driving products in competitive technical landscape through cross-team collaborations.A Hardware Verification tool development leader with extensive experience in industry leading synthesis tools, Hardware simulators and emulators. With strong track record on delivering challenging and novel solutions and deploying to utmost customer satisfaction. A very fast learner, a team leader, a critical thinker and like to challenge myself with harder customer needs often with novel solutions.
Experience
Distingushed Engineer
Jul 2022 — Present · San Jose, CA, US
Education
Indian Institute of Technology, Kharagpur
Master's degree, Computer Engineering
Sambalpur University
BE, Electronics and Tele communication
1987 — 1991
Indian Institute of Technology, Kharagpur
M. Tech., Computer Engineer
1995 — 1997
Skills
- Functional Verification
- Systemc
- Vlsi
- Tcl
- Formal Verification
- Asic
- Vhdl
- Simulations
- Compilers
- C++
- Perl
- Eda
- Algorithms
- Debugging
- Systemverilog
- C
- Verilog
- Soc
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