Amit Purohit
- Role
- Engineer at 新思科技股份有限公司
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
Experience
Engineer
Feb 2019 — Present
Developing hierarchical DFT flow.\\\\n- Working on pattern porting tool to allow core level patterns to port to top level.\\\\n- Allow core level pattern generation to be independent of other cores and port patterns adjusting different core shift lengths and pipeline stages.\\\\n\\\\n- Streaming Fabric pattern porting\\\\n- Enabling core to top pattern porting through Streaming Fabric supporting various core compression types ( ucompressed / DFTMax / ULTRA / SEQ ).\\\\n- Supporting core failure diagnosis flow to map failure top to core failures.\\\\n\\\\n- Failure log mapping.\\\\n- Developing top to core failulre log mapping for various compression types with different fabric types.\\\\n\\\\n- Developing pattern porting to share scan enable across different cores with different scan pattern shift length.\\\\n\\\\n- Developing stil to PDL converter software.\\\\n \\\\n\\\\n \\\\n \\\\n\\\\n \\\\n
Skills
- Asic
- Vhdl
- Ic
- Testing
- Debugging
- Tcl
- Integrated Circuit Design
- C++
- Linux
- C
- Vlsi
- Eda
- Dft
- Verilog
- Semiconductors
- Application-Specific Integrated Circuits (Asic)
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