Amit Kumar Chourasia

About Amit Kumar Chourasia

Working at Intel, as Engineering Manager. Leading a team of RTL and VAL engineers in the Power Management Unit of IA Core Team.In current role, I am responsible for the Front end execution of next gen IA Core, for on time and quality Tape-in. Also, as Engineering Manager of Power Management Unit, am leading and developing PM team.In the 13+ yrs of career at Intel, I have worked in multiple roles as Verification Engineer at full chip & Core IP level, physical design engineer and RTL designer for multiple designs like Execution Unit, Branch Predictions, Fetch and Decode units.Joined Intel in 2010. Did M.E in Microelectronics from BITS Pilani (20••••10). Did internship in ST Microelectronics from Jan-June 2010. My interests are in Computer Architecture and RTL design.I have good knowledge of Digital Design, Verilog, STA, Synopsys DC and ICC tool, Verdi tool, VCS, ModelSim. Familiar with CDC and RDC concepts. Possess very good analytical and debug skills and a quick learner.

Experience

1. Cpu Logic Design Manager

   IBM

   Jan 2026 — Present · IN

   Working as the Senior Logic Design Manager in the Power Processor team at IBM

Education

• Oriental Institute of Science & Technology, Bhopal

  B.E, Electronics and Communications

• Birla Institute of Technology and Science, Pilani

  M.E, Microelectronics

  2008 — 2010

Skills

• Rtl Design
• Functional Verification
• Ncsim
• Cadence Virtuoso
• Digital Circuit Design
• Rls
• Verification
• Specman
• Tcl
• Semiconductors
• Semiconductor Device
• Verilog
• Modelsim
• Computer Architecture
• Rtl Coding
• Semiconductor Process
• Circuit Design
• Logic Design
• Physical Design
• Rtl Verification
• Systemverilog
• Debugging
• Dft
• Synopsys Dc-T
• Microelectronics
• Soc
• Formal Verification
• Vlsi
• Digital Electronics
• Asic
• Asic Design
• Synopsys Icc
• Integrated Circuit Design