Alexandru M.

Staff Mixed Signal Design Engineer @MELEXIS

Dresden, DE
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Oct 2024 — Present

Staff Mixed Signal Design Engineer @MELEXIS

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Dresden, DE

Staff MSDE for the Dresden site involved in the Design and Verification & Validation of mixed signal automotive (ASIL B/C/D) targeted inductive/magnetic position/speed/rotation sensors ASICs/ASSPs. Role involves:• Take ownership of the digital specification and hardware-software interfaces definition for mixed-signal System-on-Chips• Make the bridge between competence centres delivering part of the SoC (Digital Design, Analog Design, Software Design, Product Verification, etc.)• Work with circuit design engineers and system architects to define verification needs and create verification plans• Plan & perform detailed simulation and verification of top level mixed-signal and embedded software functionality• Be involved in the system modelling to conceptualise and validate circuits• Develop and integrate high-level functional models and test benches to support system simulation• Develop Verilog-AMS and System Verilog behavioural models• Ensure validity and optimise performance of designers’ behavioural models• Understanding design specification from documentation or directly from Verilog/SystemVerilog/VerilogAMS code and schematic; understanding internal flows and methodologies• Designing directed testbenches for Verilog/SystemVerilog IP level verification of RTL and analog models in SystemVerilog and VerilogAMS• Designing mixed mode constrained random and directed testcases for system level verification for a mixed-signal position sensor• Designing checkers for a directed test approach (VMM, in-house methodology or no methodology used)• Simulation and debugging of mixed mode netlisted schematic full-chip or netlisted VAMS models for system level verification• Updating the verification environment to conform with new design specifications• Building checkers based on design specification for completely self-checking environmentTools used include Cadence Incisive, Cadence SimVision Debug, CVS (Linux), JIRA, SVN(Windows), Polarion (Requirement management)

EDUCATION

2011 — 2013

Gheorghe Asachi​ Technical University of Iași

Master of Engineering - MEng, Computer Science / Embedded Systems

2013 — 2013

Gheorghe Asachi​ Technical University of Iași

Post-Graduate course, Planning and control strategies for mobile robots

2007 — 2011

Gheorghe Asachi​ Technical University of Iași

Bachelor of Engineering - BE, Computer Science

ABOUT ALEXANDRU M.

A motivated and enthusiastic Computer Science Engineer with 11 years experience (MEng, 1st – Embedded Systems with Honors, BEng, 2nd – Computer Science). Strong understanding of verification methodologies and design issues, having worked in Digital and Mixed-Signal as well as software and hardware development teams at SoC and IP level, in close contact with design and verification, software/firmware and hardware engineers and leads.

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