Amey Marathe
Sr. System Performance Engineer at NVIDIA
- Role
- Sr System Performance Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Sr System Performance Engineer
Jun 2020 — Present · Santa Clara County, CA, US
Education
University of Southern California
M.S, Electrical Engineering (VLSI)
2010 — 2012
Vidyalankar Institute of Technology, University of Mumbai
Bachelors of Engineering, Electronics Engineering
2006 — 2010
Skills
- Verilog
- Vhdl
- C/C++ Stl
- Perl
- Tcl
- Php
- Modelsim
- Cadence Virtuoso
- Xilinx
- Ncsim
- Primetime
- Digital Design
- Hardware Design
- Rtl Design
- Hardware Verification
- Unix
- Dc
- Spectre
- Circuit Design
- Spice
- C
- Pspice
- Embedded Systems
- Hardware
- Dft
- Synopsys Tools
- Integrated Circuit Design
- Cadence
- Vlsi
- Debugging
- Rtl Coding
- Ic
- Memory Controllers
- Systemverilog
- Computer Architecture
- Simulations
- Physical Design
- Static Timing Analysis
- Asic
- Hardware Architecture
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