Ambili Vengallur
- Role
- Design Engineer at Intel
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Engineer
Jul 2008 — Present
Logic Design, Verification
Skills
- Circuit Design
- Logic Synthesis
- Vlsi
- Rtl Design
- Vhdl
- Ic
- Tcl
- Verilog
- Simulations
- Fpga
- Cmos
- Signal Processing
- Integrated Circuit Design
- Systemverilog
- Semiconductors
- Asic
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