Amaresh Chaubey
Verification Engineer
- Role
- Design Verification Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Verification Engineer
Dec 2025 — Present · Karnataka, IN
Skills
- Systemverilog
- Functional Verification
- Asic
- Verilog
- Vlsi
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