Aman Ranjan

About Aman Ranjan

Worked as an intern at STMicroelectronics in Smart Power technology (SPT) Department Project Name: Radiation Hardening By Design in Flip Flop CircuitsDescription:* Worked on Radiation hardened Flip-Flop circuits. Initially, Flip-Flops are designed using Cadence Virtuoso tool. After that netlist of the design is extracted (.cir file). Different test cases were applied using Eldo simulator to calculate different parameters like propagation delay, power dissipation etc. Radiation is applied in the form of current pulse by including current source model file.* Similar analysis is done on system level radiation hardened Flip-Flop circuit like TMR, delta TMR to combat the effect of radiation.* Similar analysis is done on autocorrect TMR, DMR, Delta TMR circuit based on autorefresh D Flip-Flop circuit which removes the accumulation of SEUs over time in low power design. Learning Experience:* Good understanding of Digital vlsi design and analog vlsi design.* Good understanding of ASIC design flow (Frontend and Backend)* Good understanding of Verilog, RTL design and SystemVerilog* Basic knowledge of DFT, Static timing analysis, UVM, physical design

Experience

1. Silicon Validation Engineer(Consultant from Tech Mahindra)

   Google

   Apr 2024 — Present · Bengaluru, IN

   Working on electrical validation of mphy ( Transmitter and Receiver )

Education

• Birla Institute of Technology, Mesra

  Bachelor of Engineering - BE

  2014 — 2018

• National Institute of Technology Durgapur

  Mtech - Microelectronics and VLSI