Aly Elsayed
Lead Developer @Vosyn
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WORK HISTORY
Lead Developer @Vosyn
I partnered closely with product and cross-functional teams to define clear quality benchmarks and translate business requirements into technical requirements. I also provided hands-on technical mentorship to a team of 14 machine learning developers, guiding them on LM machine translation fine-tuning best practices and Vertex AI orchestration, which measurably increased the team’s deployment velocity.Data Pipeline:• Directing the development of end-to-end data ingestion pipelines, overseeing the scraping and processing of public-domain parallel corpora. Automating up to 22.5M sentence pairs and 9GB of data processing.• Defining custom cleaning heuristics to filter noise from open-source data, ensuring high-quality datasets for fine-tuning on Google Cloud Storage (GCS).• Guiding the team in expanding data coverage through the creation of high-quality, in-house custom datasets.Training Pipeline:• Architecting a scalable CI training pipeline on Vertex AI using custom training jobs, enabling the team to conduct efficient fine-tuning and experimentation across multiple language pairs, cutting down 100% of idle VM workbenches costs.• Delivering competitive multilingual performance across EN→JA, EN→ZH, achieving COMET scores of 0.70 and 0.78 respectively.• Spearheading the engineering of CI/CD pipelines in GitLab, enabling the team to perform automated testing, model versioning, and repeatable deployments.Evaluation and Deployment Pipeline:• Deploying a hybrid inference model using Vertex AI Endpoints for GPU-intensive tasks and Cloud Run for cost-effective pre-processing.• Exploring the trade-offs between lexical metrics (fast, deterministic n-gram overlap) and semantic metrics (context-aware neural embeddings) to optimize the team\'s model-tuning strategy.• Establishing a multi-faceted evaluation framework that combines quantitative metrics (COMET, sacreBLEU, chrF++) with LLM-as-a-judge for qualitative analysis.
EDUCATION
Schulich School of Engineering, University of Calgary
Bachelor of Engineering - BE, Electrical and Electronics Engineering;
University of Toronto
Master of Engineering - MEng, Electrical and Computer Engineering
ABOUT ALY ELSAYED
I’m an electrical engineer and machine learning researcher passionate about building robust, scalable AI solutions that bridge the gap between cutting-edge research and real-world impact. My unique blend of expertise spans deploying low-latency machine learning pipelines on AWS, as well as control system design, power electronics, and analog/mmWave IC design (LNAs, PAs, VCOs, and Mixers in 22nm FDSOI CMOS).What I Bring- Model Optimization & Efficiency: I specialize in optimizing models for resource-constrained environments without compromising performance, with a focus on Graph Neural Networks (GNNs). By applying techniques like structured pruning and quantization, I’ve reduced model sizes by over 75% while preserving critical accuracy. My early-exit optimization strategies have also accelerated inference speeds over 4x, enabling seamless deployment on edge devices and cloud infrastructure alike- End-to-End ML Pipeline Expertise: I design and deploy comprehensive machine learning workflows, from data ingestion to inference. My experience includes real-time feature ingestion using Kafka and SQL on AWS EC2, efficient data querying with AWS S3 and AWS Athena, model training with PyTorch and TensorFlow, and scalable inference deployment using FastAPI and AWS Lambda- Analog and RF IC Design: Designed and verified a 25–28 GHz cross-coupled VCO (1 mW Pout,<–103 dBc/Hz @1 MHz,<25 mW power on 0.8 V), a 27 GHz differential LNA (NF 13 dB, BW 2.7 GHz), and a 40 GHz series-stacked FDSOI power amplifier (18 dBm OP1dB,>15 dB gain, 33% PAE), performing full schematic, layout, parasitic extraction, and RF simulations (PSS, PNoise, load-pull) to meet aggressive specs. I characterized HF 22nm FDSOI transistors for fT, fMax, and NFmin- Control System Design: I modelled and tuned PI-controlled current-control loops on PSIM and Simulink for an H-bridge driving an inductive plant, implemented the digitized PI-controller on a TI F28379 MCU with the Backward Euler method, and developed verification and validation (V&V) test plans and benches using RTD, datalogger, wattmeter, thermal camera, current clamp, oscilloscope, and function generator for frequency response, power, and temperature testing.I’m always excited to connect with others who share a passion for leveraging AI and engineering to solve real-world challenges.
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